1. Technical Field
The present invention relates to the technology for mounting a plurality of integrated circuit (IC) chips used to control electro-optic elements.
2. Related Art
Electro-optic devices using a plurality of IC chips in order to drive various electro-optic elements such as organic light-emitting diode elements have been suggested. For example, JP-A-2006-154835 discloses a display device in which a plurality of IC chips are connected to one another in a cascade configuration. In a configuration of the display device disclosed in JP-A-2006-154835, capacitance or resistance associated with a transmission line of a signal (hereinafter, referred to as a “control signal”) for controlling each of the IC chips is decreased, for example, compared with a case where the IC chips are connected to a common wiring pattern. Accordingly, distortion of the control signal can be suppressed, so that a high-speed control of each of the IC chips can be realized.
In the configuration of the display device disclosed in JP-A-2006-154835, various types of potentials are supplied through a plurality of electric supply lines configured on the surface of a substrate to each of the IC chips. That is, as shown in FIG. 10, a potential V1 is supplied through a common electric supply line 93 to each of a plurality of IC chips 91, and a potential V2 is supplied through a common electric supply line 94 to each of the IC chips 91. However, in the configuration shown in FIG. 10, a structure (multilayer structure) in which the electric supply lines 93 and 94 intersect one another on the surface of the substrate at portions A shown in FIG. 10 is required. Accordingly, the configuration has disadvantages, for example, in that the manufacture cost of electro-optic devices is increased or in that each of the portions in which the electric supply lines 93 and 94 intersect one another is easily short-circuited.